Concept: Thin-film transistor
In this article, we report only 10 atomic layer thick, high mobility, transparent thin film transistors (TFTs) with ambipolar device characteristics fabricated on both a conventional silicon platform as well as on a flexible substrate. Monolayer graphene was used as metal electrodes, 3-4 atomic layers of h-BN were used as the gate dielectric, and finally bilayers of WSe2 were used as the semiconducting channel material for the TFTs. The field effect carrier mobility was extracted to be 45 cm(2)/(V s), which exceeds the mobility values of state of the art amorphous silicon based TFTs by ∼100 times. The active device stack of WSe2-hBN-graphene was found to be more than 88% transparent over the entire visible spectrum and the device characteristics were unaltered for in-plane mechanical strain of up to 2%. The device demonstrated remarkable temperature stability over 77-400 K. Low contact resistance value of 1.4 kΩ-μm, subthreshold slope of 90 mv/decade, current ON-OFF ratio of 10(7), and presence of both electron and hole conduction were observed in our all two-dimensional (2D) TFTs, which are extremely desirable but rarely reported characteristics of most of the organic and inorganic TFTs. To the best of our knowledge, this is the first report of all 2D transparent TFT fabricated on flexible substrate along with the highest mobility and current ON-OFF ratio.
Trialkylgermyl functionalization allows development of high-performance soluble small-molecule organic semiconductors with mobilities greater than 5 cm(2) V(-1) s(-1) . Spray-deposited organic thin-film transistors show a record mobility of 2.2 cm(2) V(-1) s(-1) and demonstrate the potential for incorporation in large-area, low-cost electronic applications.
Organic semiconductors with higher carrier mobility and better transparency have been actively pursued for numerous applications, such as flat-panel display backplane and sensor arrays. The carrier mobility is an important figure of merit and is sensitively influenced by the crystallinity and the molecular arrangement in a crystal lattice. Here we describe the growth of a highly aligned meta-stable structure of 2,7-dioctylbenzothieno[3,2-b]benzothiophene (C8-BTBT) from a blended solution of C8-BTBT and polystyrene by using a novel off-centre spin-coating method. Combined with a vertical phase separation of the blend, the highly aligned, meta-stable C8-BTBT films provide a significantly increased thin film transistor hole mobility up to 43 cm(2) Vs(-1) (25 cm(2) Vs(-1) on average), which is the highest value reported to date for all organic molecules. The resulting transistors show high transparency of >90% over the visible spectrum, indicating their potential for transparent, high-performance organic electronics.
A silver molecular ink platform formulated for screen, inkjet and aerosol printing is presented. A simple formulation comprising silver neodecanoate, ethyl cellulose and solvent provides improved performance vs established inks yet with improved economics. Thin, screen printed traces with exceptional electrical (< 10 mΩ/□/mil or 12 μΩ·cm)) and mechanical properties are achieved following thermal or photonic sintering, the latter having never been demonstrated for silver salt based inks. Low surface roughness, sub-micron thicknesses and linewidths as narrow as 41 μm outperform commercial ink benchmarks based on flakes or nanoparticles. These traces are mechanically robust to flexing and creasing (less than 10% change in resistance) and bind strongly to epoxy-based adhesives. Thin traces are remarkably conformal, enabling fully printed metal-insulator-metal (MIM) band-pass filters. The versatility of the molecular ink platform enables an aerosol jet compatible ink that yields conductive features on glass with 2X bulk resistivity and strong adhesion to various plastic substrates. An inkjet formulation is also used to print top source/drain contacts and demonstrate printed high mobility thin film transistors (TFT) based on semiconducting single walled carbon nanotubes. TFTs with mobility values of ~25 cm(2)V(-1)sec(-1) and current on/off ratios > 10(4) were obtained, performance similar to evaporated metal contacts in analogous devices.
Physical properties of active materials built up from small molecules are dictated by their molecular packing in the solid state. Here we demonstrate for the first time the growth of n-channel single-crystal field-effect transistors and organic thin-film transistors by sublimation of 2,6-dichloro-naphthalene diimide in air. Under these conditions, a new polymorph with two-dimensional brick-wall packing mode (β-phase) is obtained that is distinguished from the previously reported herringbone packing motif obtained from solution (α-phase). We are able to fabricate single-crystal field-effect transistors with electron mobilities in air of up to 8.6 cm(2) V(-1) s(-1) (α-phase) and up to 3.5 cm(2) V(-1) s(-1) (β-phase) on n-octadecyltriethoxysilane-modified substrates. On silicon dioxide, thin-film devices based on β-phase can be manufactured in air giving rise to electron mobilities of 0.37 cm(2) V(-1) s(-1). The simple crystal and thin-film growth procedures by sublimation under ambient conditions avoid elaborate substrate modifications and costly vacuum equipment-based fabrication steps.
Small-channel organic thin-film transistors (OTFTs) are an essential component of microelectronic devices. With the advent of flexible electronics, the fabrication of OTFTs still faces numerous hurdles in the realization of highly-functional, devices of commercial value. Herein, a concise and efficient procedure is proposed for the fabrication of flexible, small-channel organic thin-film transistor (OTFT) arrays on large-area substrates that circumvents the use of photolithography. By employing a low-cost and high-resolution mechano-electrospinning technology, large-scale micro/nanofiber-based patterns can be digitally printed on flexible substrates (Si wafer or plastic), which can act as the channel mask of TFT instead of a photolithography reticle. The dimensions of the micro/nanochannel can be manipulated by tuning the processing parameters such as the nozzle-to-substrate distance, applied voltage, and fluid supply. The devices exhibit excellent electrical properties with high mobilities (∼0.62 cm(2) V(-1) s(-1)) and high on/off current ratios (∼2.47 × 10(6)), and they are able to maintain stability upon being bent from 25 mm to 2.75 mm (bending radius) over 120 testing cycles. This electrohydrodynamic lithography-based approach is a digital, programmable, and reliable alternative for easily fabricating flexible, small-channel OTFTs, which can be integrated into flexible and wearable devices.
Amorphous oxide semiconductor-based thin film transistors (TFTs) have been considered as excellent switching elements for driving active-matrix organic light-emitting diodes (AMOLED) owing to their high mobility and process compatibility. However, oxide semiconductors have inherent defects, causing fast transient charge trapping and device instability. For the next-generation displays such as flexible, wearable, or transparent displays, an active semiconductor layer with ultra-high mobility and high reliability at low deposition temperature is required. Therefore, we introduced high density plasma microwave-assisted (MWA) sputtering method as a promising deposition tool for the formation of high density and high-performance oxide semiconductor films. In this paper, we present the effect of the MWA sputtering method on the defects and fast charge trapping in In-Sn-Zn-O (ITZO) TFTs using various AC device characterization methodologies including fast I-V, pulsed I-V, transient current, low frequency noise and discharge current analysis. Using these methods, we were able to analyze the charge trapping mechanism and intrinsic electrical characteristics, and extract the sub-gap density of the states of oxide TFTs quantitatively. In comparison to conventional sputtered ITZO, high density plasma MWA-sputtered ITZO exhibits outstanding electrical performance, negligible charge trapping characteristics and low sub-gap density of states. High density plasma MWA sputtering method lowers discharging voltage, the ion bombardment energy and negative oxygen ion amount, resulting in forming low defect generation in ITZO and presenting high performance ITZO TFT. We expect the proposed high density plasma sputtering method to be applicable to a wide range of oxide semiconductor device applications.
Amorphous indium gallium zinc oxide (a-IGZO) is a transparent semiconductor which has demonstrated excellent electrical performance as thin film transistors (TFTs). However, a high-temperature activation process is generally required which is incompatible for next-generation flexible electronic applications. In this work, He(+) irradiation is demonstrated as an athermal activation process for a-IGZO TFTs. Controlling He+ dose enables the tuning of charge density and a dose of 1×10(14) He(+)/cm(2) induces a change in charge density of 2.3×10(12) cm(-2). Time dependent transport measurements and time-of-flight secondary ion mass spectroscopy (ToF-SIMS) indicate that the He+-induced trapped charge is introduced due to preferential oxygen vacancy generation. Scanning microwave impedance microscopy confirms that He+ irradiation improves the conductivity of the a-IGZO. To realize a permanent activation, IGZO was exposed with a He(+) dose of 5×10(14) He(+)/cm(2) and then aged 24 hours to allow decay of the trapped oxide charge originating for electron-hole pair generation. The resultant shift in the charge density is primarily attributed to oxygen vacancies generated by He(+) sputtering in the near surface region.
Tungsten-indium-zinc-oxide thin-film transistors (WIZO-TFTs) were fabricated using a radio frequency (RF) co-sputtering system with two types of source/drain (S/D)-electrode material of conducting WIZO (homojunction structure) and the indium-tin oxide (ITO) (heterojunction structure) on the same WIZO active-channel layer. The electrical properties of the WIZO layers used in the S/D electrode and the active-channel layer were adjusted through oxygen partial pressure during the deposition process. To explain enhancements of the device performance and stability of the homojunction-structured WIZO-TFT, a systematic investigation of correlation between device performance and physical properties at the interface between the active layer and the S/D electrodes such as the contact resistance, surface/interfacial roughness, interfacial-trap density, and interfacial energy-level alignments was conducted. The homojunction-structured WIZO-TFT exhibited a lower contact resistance, smaller interfacial-trap density, and flatter interfacial roughness than the WIZO-TFT with the heterojunction structure. The 0.09 eV electron barrier of the homojunction-structured WIZO-TFT is lower than the 0.21 eV value that was obtained for the heterojunction-structured WIZO-TFT. This reduced electron barrier may be attributed to enhancements of device performance and stability, that are related to the carrier transport.
The electrical characteristics of carbon nanotube (CNT) thin-film transistors (TFTs) strongly depend on the properties of the gate dielectric that is in direct contact with the semiconducting CNT channel materials. Here, we systematically investigated the dielectric effects on the electrical characteristics of fully printed semiconducting CNT-TFTs by introducing the organic dielectrics of poly(methyl methacrylate) (PMMA) and Octadecyltrichlorosilane (OTS) to modify SiO2 dielectric. The results showed that the organic-modified SiO2 dielectric formed a favorable interface for the efficient charge transport in s-SWCNT-TFTs. Compared to single-layer SiO2 dielectric, the use of organic-inorganic hybrid bilayer dielectrics dramatically improved the performances of SWCNT-TFTs such as mobility, threshold voltage, hysteresis and On/Off ratio due to the suppress of charge scattering, gate leakage current and charge trapping. The transport mechanism is related that the dielectric with few charge trapping provided efficient percolation pathways for charge carriers, while reduced the charge scattering. High density of charge traps which could directly act as physical transport barriers and significantly restrict the charge carrier transport and, thus, result in decreased mobile carriers and low device performance. Moreover, the gate leakage phenomenon is caused by conduction through charge traps. So, as a component of TFTs, the gate dielectric is of crucial importance to the manufacture of high quality TFTs from the aspects of affecting the gate leakage current and device operation voltage, as well as the charge carrier transport. Interestingly, the OTS-modified SiO2 allows to directly print horizontally aligned CNT film, and the corresponding devices exhibited a higher mobility than that of the devices with the hybrid PMMA/SiO2 dielectric although the thickness of OTS layer is only ~2.5 nm. Our present result may provide key guidance for the further development of printed nanomaterial electronics.