Concept: Silicon on insulator
Silicon photonics enables large-scale photonic-electronic integration by leveraging highly developed fabrication processes from the microelectronics industry. However, while a rich portfolio of devices has already been demonstrated on the silicon platform, on-chip light sources still remain a key challenge since the indirect bandgap of the material inhibits efficient photon emission and thus impedes lasing. Here we demonstrate a class of infrared lasers that can be fabricated on the silicon-on-insulator (SOI) integration platform. The lasers are based on the silicon-organic hybrid (SOH) integration concept and combine nanophotonic SOI waveguides with dye-doped organic cladding materials that provide optical gain. We demonstrate pulsed room-temperature lasing with on-chip peak output powers of up to 1.1 W at a wavelength of 1,310 nm. The SOH approach enables efficient mass-production of silicon photonic light sources emitting in the near infrared and offers the possibility of tuning the emission wavelength over a wide range by proper choice of dye materials and resonator geometry.
Unusual mechanical properties of mechanical metamaterials are determined by their carefully designed and tightly controlled geometry at the macro- or nanoscale. We introduce a class of nanoscale mechanical metamaterials created by forming continuous corrugated plates out of ultrathin films. Using a periodic three-dimensional architecture characteristic of mechanical metamaterials, we fabricate free-standing plates up to 2 cm in size out of aluminium oxide films as thin as 25 nm. The plates are formed by atomic layer deposition of ultrathin alumina films on a lithographically patterned silicon wafer, followed by complete removal of the silicon substrate. Unlike unpatterned ultrathin films, which tend to warp or even roll up because of residual stress gradients, our plate metamaterials can be engineered to be extremely flat. They weigh as little as 0.1 g cm(-2) and have the ability to ‘pop-back’ to their original shape without damage even after undergoing multiple sharp bends of more than 90°.
We report on a compact, ultra-broadband, 2×2 adiabatic 3 dB coupler using silicon-on-insulator (SOI) strip waveguides assisted by sub-wavelength gratings (SWGs). In our device, two tapered SWG-assisted SOI strip waveguides achieve an adiabatic mode evolution of the two lowest-order transverse electric modes, in a two-waveguide system, for broadband 3 dB power splitting. Theory predicts that the proposed coupler will operate from 1200 nm to 1700 nm. We have been able to measure the performance of a device with a 15 μm long mode evolution region that achieves even, broadband power splitting over the 185 nm wavelength range of our tunable laser with an imbalance of less than ±0.3 dB and with low average excess losses of <0.11 dB.
We propose and demonstrate a silicon-on-insulator (SOI)-based widely tunable microwave photonic filter (MPF), which is implemented by using an under-coupled microring resonator (MRR) assisted by two cascaded tunable Mach-Zehnder interferometers. In the experiment, the MPF achieves an ultrahigh peak rejection exceeding 60 dB, a full width at half-maximum bandwidth of 780 MHz, and a frequency tuning range of 0-40 GHz, even when the propagation loss of the MRR is 1.65 dB/cm. To the best of our knowledge, this MPF demonstrates ultrahigh peak rejection and narrow bandwidth simultaneously in SOI for the first time with MRR of such propagation loss and avoids using external electrical devices to improve the rejection.
This paper presents a novel structural piezoresistive pressure sensor with four-grooved membrane combined with rood beam to measure low pressure. In this investigation, the design, optimization, fabrication, and measurements of the sensor are involved. By analyzing the stress distribution and deflection of sensitive elements using finite element method, a novel structure featuring high concentrated stress profile (HCSP) and locally stiffened membrane (LSM) is built. Curve fittings of the mechanical stress and deflection based on FEM simulation results are performed to establish the relationship between mechanical performance and structure dimension. A combination of FEM and curve fitting method is carried out to determine the structural dimensions. The optimized sensor chip is fabricated on a SOI wafer by traditional MEMS bulk-micromachining and anodic bonding technology. When the applied pressure is 1 psi, the sensor achieves a sensitivity of 30.9 mV/V/psi, a pressure nonlinearity of 0.21% FSS and an accuracy of 0.30%, and thereby the contradiction between sensitivity and linearity is alleviated. In terms of size, accuracy and high temperature characteristic, the proposed sensor is a proper choice for measuring pressure of less than 1 psi.
Strain engineering is seen as a cost-effective way to improve the properties of electronic devices. However, this technique is limited by the development of the Asarro Tiller Grinfeld growth instability and nucleation of dislocations. Two strain engineering processes have been developed, fabrication of stretchable nanomembranes by deposition of SiGe on a sacrificial compliant substrate and use of lateral stressors to strain SiGe on Silicon On Insulator. Here, we investigate the influence of substrate softness and pre-strain on growth instability and nucleation of dislocations. We show that while a soft pseudo-substrate could significantly enhance the growth rate of the instability in specific conditions, no effet is seen for SiGe heteroepitaxy, because of the normalized thickness of the layers. Such results were obtained for substrates up to 10 times softer than bulk silicon. The theoretical predictions are supported by experimental results obtained first on moderately soft Silicon On Insulator and second on highly soft porous silicon. On the contrary, the use of a tensily pre-strained substrate is far more efficient to inhibit both the development of the instability and the nucleation of misfit dislocations. Such inhibitions are nicely observed during the heteroepitaxy of SiGe on pre-strained porous silicon.
This paper presents a novel full-depletion Si X-ray detector based on silicon-on-insulator pixel (SOIPIX) technology using a pinned depleted diode structure, named the SOIPIX-PDD. The SOIPIX-PDD greatly reduces stray capacitance at the charge sensing node, the dark current of the detector, and capacitive coupling between the sensing node and SOI circuits. These features of the SOIPIX-PDD lead to low read noise, resulting high X-ray energy resolution and stable operation of the pixel. The back-gate surface pinning structure using neutralized p-well at the back-gate surface and depleted n-well underneath the p-well for all the pixel area other than the charge sensing node is also essential for preventing hole injection from the p-well by making the potential barrier to hole, reducing dark current from the Si-SiO₂ interface and creating lateral drift field to gather signal electrons in the pixel area into the small charge sensing node. A prototype chip using 0.2 μm SOI technology shows very low readout noise of 11.0 e-rms, low dark current density of 56 pA/cm² at -35 °C and the energy resolution of 200 eV(FWHM) at 5.9 keV and 280 eV (FWHM) at 13.95 keV.
Mechanically detected terahertz electron spin resonance using SOI-based thin piezoresistive microcantilevers
- Journal of magnetic resonance (San Diego, Calif. : 1997)
- Published over 2 years ago
We developed piezoresistive microcantilevers for mechanically detected electron spin resonance (ESR) in the millimeter-wave region. In this article, fabrication process and device characterization of our self-sensing microcantilevers are presented. High-frequency ESR measurements of a microcrystal of paramagnetic sample is also demonstrated at multiple frequencies up to 160 GHz at liquid helium temperature. Our fabrication is based on relatively simplified processes with silicon-on-insulator (SOI) wafers and spin-on diffusion doping, thus enabling cost-effective and time-saving cantilever fabrication.
We present a simple and practical strategy that allows to design high-efficiency grating couplers. The technique is based on the simultaneous apodization of two structural parameters: the grating period and the fill-factor, along with the optimization of the grating coupler etching depth. Considering a 260 nm Si-thick Silicon-on-insulator platform, we numerically demonstrated a coupling efficiency of -0.8 dB (83%), well matching the experimental value of -0.9 dB (81%). Thanks to the optimized design, these results represent the best performance ever reported in the literature for SOI structures without the use of any back-reflector.
Ultra-compact polarization-independent directional couplers are proposed and demonstrated on the silicon-on-insulator (SOI) platform. By using the subwavelength structure in the coupling region, the coupling strength is greatly enhanced only for TE polarization, so that the coupling strength could be equivalent between TE and TM polarizations. Both complete coupling and 3 dB splitting have been demonstrated. The coupling length could be as short as ∼3.75 μm. The measured excess losses and polarization dependence losses are <∼1 and <∼0.5 dB.